Bulldozer (microarchitecture)
Microarchitecture by AMD / From Wikipedia, the free encyclopedia
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The AMD Bulldozer Family 15h is a microprocessor microarchitecture for the FX and Opteron line of processors, developed by AMD for the desktop and server markets.[1][2] Bulldozer is the codename for this family of microarchitectures. It was released on October 12, 2011, as the successor to the K10 microarchitecture.
General information | |
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Launched | Late 2011 |
Common manufacturer(s) | |
Architecture and classification | |
Technology node | 32 nm |
Instruction set | x86-64 |
Physical specifications | |
Socket(s) | |
Products, models, variants | |
Core name(s) | |
History | |
Predecessor(s) | Family 10h (K10) |
Successor(s) | Piledriver - Family 15h (2nd-gen) |
Bulldozer is designed from scratch, not a development of earlier processors.[3] The core is specifically aimed at computing products with TDPs of 10 to 125 watts. AMD claims dramatic performance-per-watt efficiency improvements in high-performance computing (HPC) applications with Bulldozer cores.
The Bulldozer cores support most of the instruction sets implemented by Intel processors (Sandy Bridge) available at its introduction (including SSSE3, SSE4.1, SSE4.2, AES, CLMUL, and AVX) as well as new instruction sets proposed by AMD; ABM, XOP, FMA4 and F16C.[4][5] Only Bulldozer GEN4 (Excavator) supports AVX2 instruction sets.